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Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip


Huge Savings Item! Save 20% on the Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip by Springer at EMS Linux. Hurry! Limited time offer. Offer valid only while supplies last. This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically


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This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.

Additional Information

Manufacturer:Springer
Publisher:Springer
Studio:Springer
EAN:9783319604015
Item Size:0.44 x 9.21 x 9.21 inches
Package Weight:0.5 pounds
Package Size:6.38 x 0.63 x 0.63 inches

Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip by Springer

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Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

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